Conference

Conference Day 1

Time (PDT) Title Presenters
8:45AM-9:00AM Introductions
 
  Hot Chips 34 Welcome
 
9:00AM-11:00AM GPUs & HPC

Chair: Natalia Vassilieva, Cerebras
 
  NVIDIA’s Hopper GPU: Scaling Performance
Jack Choquette & Ronny Krashinsky, NVIDIA
  AMD Instinct™ MI200 Series Accelerator and Node Architectures
Alan Smith & Norman James, AMD
  Intel’s Ponte Vecchio GPU: Architecture, System and Software
Hong Jiang, Intel
  Biren BR100 GPGPU: Accelerating Datacenter Scale AI Computing
Mike Hong & Lingjie Xu, Biren Technology
11:00AM-11:30AM Break
 
11:30AM-12:00PM Integration Technologies (part1)

Chair: Pradeep Dubey, Intel
 
  Passage—A Wafer-Scale, Programmable Photonic Communication Substrate
Nicholas Harris, Lightmatter
12:00PM-1:00PM Break
 
1:00PM-2:00PM Keynote #1

Chair: Krste Asanovic, UC Berkeley/SiFive
 
  Semiconductors Run the World
Pat Gelsinger, Intel
2:00M-3:30PM Integration Technologies (part2)

Chair: Pradeep Dubey, Intel
 
  Heterogenous Integration Enables FPGA Based Hardware Acceleration for RF Applications
Sergey Yuryevich Shumarayev, Intel
  Enabling scalable application-specific optical engines (ASOE) by monolithic integration of photonics and electronics
Christoph Schulien, Ranovus
  Scaling of Memory Performance and Capacity with CXL Memory Expander
Sung Joo Park, Samsung
3:30PM-4:00PM Break
 
4:00PM-6:00PM Academia

Chair: Forest Baskett, NEA
 
  HALO: A Flexible and Low Power Processing Fabric for Brain-Computer Interfaces
Abhishek Bhattacharjee & Rajit Manohar, Yale University
  Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVs
Alfio Di Mauro, ETH Zurich
  Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration
Kathleen Feng, Stanford
  Arm Morello Evaluation Platform - Validating CHERI-based Security in a High-performance System
Richard Grisenthwaite, Arm

Conference Day 2

Time (PDT) Title Presenters
8:30AM-11:00AM Machine Learning

Chair: Ronny Krashinsky, NVIDIA
 
  Groq Software-Defined Scale-out Tensor Streaming Multi-Processor
Dennis Abts, Groq
  Boqueria - Next Generation At-Memory Inference Acceleration Device with 1,000+ RISC-V cores
Robert Beachler, Untether AI
  DOJO: The Microarchitecture of Tesla’s Exa-Scale Computer
Emil Talpes, Tesla
  DOJO - Super-Compute System Scaling for ML Training
Bill Chang, Tesla
  Cerebras Architecture Deep Dive: First Look Inside the HW/SW Co-Design for Deep Learning
Sean Lie, Cerebras
11:00AM-11:30AM Break
 
11:30AM-1:00PM Network and Switches

Chair: Mark Hill, Microsoft/UW-Madison
 
  AMD 400G Adaptive SmartNIC SOC
Jaideep Dastidar, AMD
  Juniper’s Express 5: A 28.8Tbps Network Routing ASIC and Variations
Chang-Hong Wu, Juniper
  NVLink-Network Switch - NVIDIA’s Switch Chip for High Communication-Bandwidth SuperPODs
Alexander Ishii and Ryan Wells, NVIDIA
1:00PM-2:00PM Break
 
2:00PM-3:00PM Keynote #2

Chair: Ron Diamant, Amazon
 
  Beyond Compute - Enabling AI through System Integration
Ganesh Venkataramanan, Tesla Motors
3:00PM-4:30PM ADAS and Grace

Chair: Ian Bratt, Arm
 
  NVIDIA’s Orin System-on-Chip
Michael Ditty, NVIDIA
  NODAR 3D Vision System: Enabling Mass Production of Autonomous Vehicles
Leaf Jiang, NODAR
  NVIDIA’s Grace CPU
Jonathon Evans, NVIDIA
4:30PM-5:00PM Break
 
5:00PM-7:00PM Mobile & Edge Processors

Chair: Debjit Das Sarma, Tesla
 
  AMD Ryzen 6000 Series Processor
Jim Gibney, AMD
  Meteor Lake and Arrow Lake : Intel Next Gen 3D Client Architecture Platform with Foveros
Wilfred Gomes, Intel
  Dimensity 9000 – A Flagship SmartPhone SoC
Ericbill Wang, MediaTek
  Next-Generation Intel processor build for the edge - Intel Xeon D 2700 & 1700
Praveen Mosur, Intel
7:00PM-7:15PM HC34 Closing
 
  Hotchips Closing Remarks